Complementary bipolar NPN and PNP structures are highly desirable for several digital and analog applications. However, integrating PNP structures into BICMOS circuits presents particular challenges. A lateral bipolar PNP comprises two P-doped regions (emitter and collector) separated by a third N-doped region (base). The separation between the emitter and collector determines the base width of the transistor. The injection efficiency is reduced and the base transit time is increased resulting in a low current gain and small frequency response. Therefore, producing a base of the correct Gummel number is critical to performance. Typical state-of-the-art BICMOS technologies have silicided junctions, as a consequence of which the silicide at the diffusions in "narrow base" diffusions tends to degrade the performance of the device, particularly for shallow junction technologies, and the emitter efficiency of an integrated PNP is poor.
A second problem arises from the fact that a boron diffusion, when it is intended for a source/drain of an FET or the base contact of an NPN device, is shallow, but for a lateral PNP, a much deeper diffusion is preferred because the emitter efficiency or the amount of current drive from the PNP device is a function of the junction perimeter depth. If the emitter region is formed by diffusion into the base, the diffusion profile is curved on the sides. A curved profile provides only a very small emitter junction area where the base width is narrowest. Moreover, because the frequency response of a lateral PNP transistor is inversely proportional to the square of the electrical base width, a larger electrical base width reduces the frequency response f.sub.T.
A solution to the difficulties of contacting deep base diffusions is offered by creating a trench. One can then create an emitter from the entire trench sidewall. This provides a larger injecting area and an efficient cross-section to make a high-performance PNP. However, in fabricating integrated circuits, trench based lateral PNPs become less attractive as a function of the number of additional steps, particularly masking steps, required to create them.
There is therefore a need for a method for fabricating a high performance PNP that minimizes additional masks and is compatible with BICMOS technology.
It is an object of the invention to provide a high-performance (high current gain and good frequency response) PNP transistor.
It is a further object to provide a PNP transistor that has both high emitter efficiency and low base resistance.
It is a further object to provide a PNP transistor that can be paired with a complementary NPN transistor in a BICMOS integrated circuit.
It is a further object to provide a process for fabricating a lateral PNP that is compatible with other fabrication steps for a BICMOS circuit.
It is a further object to provide a process that requires only two masking steps in addition to those needed for fabricating the rest of a complementary bipolar PNP-NPN pair in BICMOS technology.
It is a further object to provide a process for differentially doping the walls and floor of a trench structure in integrated circuit fabrication.